low-voltage/low-power copyright ? 2 008 by silicon laboratories 11.11.2008 port 0 drivers digital peripherals uart timers 0, 1, 2, 3 pca/ wdt smbus priority crossbar decoder p0.0/vref p0.1/agnd p0.2/xtal1 p0.3/xtal2 p0.4/tx p0.5/rx p0.6/cnvstr p0.7/iref0 crossbar control port i/o configuration cip-51 8051 controller core 32k byte isp flash program memory 256 byte sram sfr bus 4096 byte xram port 1 drivers p1.0/ad0 p1.1/ad1 p1.2/ad2 p1.3/ad3 p1.4/ad4 p1.5/ad5 port 2 drivers p2.0/a8 p2.1/a9 p2.2/a10 p2.3/a11 p2.4/ale spi 0,1 analog peripherals comparators + - power net vdd/dc+ gnd/dc- xtal1 sysclk system clock configuration external oscillator circuit precision 24.5 mhz oscillator debug / programming hardware power on reset/pmu reset c2d c2ck/rst wake 10-bit 300ksps adc a m u x temp sensor external vref internal vref vdd xtal2 low power 20 mhz oscillator 6-bit iref vref gnd p1.6/ad6 p1.7/ad7 iref0 cp0, cp0a p2.5/rd p2.6/wr p2.7/c2d + - cp1, cp1a smartclock oscillator xtal3 xtal4 dc/dc converter vbat gnd vreg digital power analog power crc engine c8051f920 single/dual battery, 0.9-3.6 v, 32 kb, smartclock, 10-bit adc mcu supply voltage: 0.9 to 3.6 v - one-cell mode supports 0.9?1.8 v operation - two-cell mode supports 1.8?3.6 v operation - built-in dc-dc converter with 1.8 ?3.3 v output (65 mw max) for use in one-cell mode; c an supply external devices - typical sleep mode current < 0.1 a; retains state and ram - contents over full supply range; fast wakeup - 2 built-in brown-out detectors cover sleep and active modes 10-bit analog to digital converter - up to 300 ksps - up to 23 external inputs - external pin or internal vref (no external capacitor required) - built-in temperature sensor - external conversion start input option - autonomous burst mode with 16-bit automatic averaging ? accumulator two comparators - programmable hysteresis and response time - configurable as interrupt or reset source - low current (< 0.5 a) - up to 23 capacitive touch sense inputs memory - 4352 bytes internal data ram (256 + 4k) - 32 kb bytes flash; in-system programmable in 1024-byte ? sectors; full read/write/erase functionality over the entire ? supply range - external memory interface (multiplexed address/data) on-chip debug - on-chip debug circuitry facilitate s full speed, non-intrusive in- system debug (no emulator required) high-speed 8051 c core - pipe-lined instruction architecture ; executes 70% of instructions in 1 or 2 system clocks - 25 mips peak throughput with 25 mhz clock - expanded interrupt handler digital peripherals - 24 port i/o; all 5 v tolerant with programmable drive strength - hardware enhanced uart, spi and smbus? serial ports available concurrently - low power 32-bit smartclock (0.5 ua) operates down to 0.9v - four general purpose 16-bit counter/timers - 16-bit programmable counter array (pca) with six capture/com - pare modules and watchdog timer: ? 8, 9, 10, 11, or 16-bit pwm ? rising/falling edge capture ? frequency output ? software timer clock sources - precision internal oscillators: 24.5 mhz with 2% accuracy sup - ports uart operation; spread-spectrum mode for reduced emi - low power internal oscillator: 20 mhz - external oscillator: crystal, rc, c, cmos clock - smartclock oscillator: 32.768 khz crystal or self-oscillate - can switch between clock sources on-the-fly; useful in power saving modes ultra-small package options - 32-pin qfn (5x5 mm) - 32-pin lqfp (9x9 mm) temperature range: ?40 to +85 c
low-voltage/low-power copyright ? 2 008 by silicon laboratories 11.11.2008 silicon laboratories and silicon labs are trademarks of silicon laboratories inc. other products or brandnames mentioned her ein are trademarks or registered tr ademarks of their respective holders c8051f920 single/dual battery, 0.9-3.6 v, 32 kb, smartclock, 10-bit adc mcu selected electri cal specifications (at 25 c) parameter conditions min typ max units supply input voltage two-cell mode one-cell mode dc-dc converter disabled 1.8 ? 3.6 v dc-dc converter enabled 0.9 ? 1.8 v dc-dc boost converter output power (v out = 1.8?3.3 v) includes on and off-chip current ? ? 65 mw supply current with cpu active vdd = 1.8?3.6 v clock = 24.5 mhz (2% internal precision oscillator) ?4.1?ma supply current (shutdown) ? (v bat = 1.8 v) sleep mode; smartclock off ? 50 ? na sleep mode; smartclock running ? 0.6 ? a clock frequency range dc ? 25 mhz wakeup time two-cell mode ? 2 ? s one-cell mode ? 10 ? s internal oscillator frequency precision oscillator 24 24.5 25 mhz low power oscillator 18 20 22 mhz a/d converter resolution 10 bits throughput rate ? ? 300 ksps package information: 32-pin qfn 7 x e 7 x e bottom view e e d 8 5 4 3 2 1 6 7 32 31 30 27 26 25 29 28 17 18 20 23 24 22 21 19 16 15 13 11 10 9 12 14 d2 e2 l d2 / 2 e2 / 2 r pin #1 id a2 a a1 e a3 side view b d / 2 e / 2 mm min typ max a 0.80 0.9 1.00 a1 0.00 0.02 0.05 a2 0 0.65 1.00 a3 ? 0.25 ? b 0.18 0.25 0.30 d ? 5.00 ? d2 1.25 2.70 3.25 e ? 5.00 ? e2 1.25 2.70 3.25 e ? 0.50 ? l 0.30 0.40 0.50 n?32? nd ? 8 ? ne ? 8 ? r0.09? ? package information: 32-pin lqfp mm min typ max min typ max a ? ? 1.60 e 9.00 bsc a1 0.05 ? 0.15 e1 7.00 bsc a2 1.35 1.40 1.45 l 0.45 0.60 0.75 b 0.30 0.37 0.45 aaa 0.20 c 0.09 ? 0.20 bbb 0.20 d 9.00 bsc ccc 0.10 d1 7.00 bsc ddd 0.20 e 0.80 bsc ? 0 3.5 7 c8051f9xx product family device part # package flash size ram size c8051f930-gq 32-pin lqfp 64 kb 4 kb c8051f930-gm 32-pin qfn 64 kb 4 kb c8051f931-gm 24-pin qfn 64 kb 4 kb c8051f920-gq 32-pin lqfp 32 kb 4 kb c8051f920-gm 32-pin qfn 32 kb 4 kb c8051f921-gm 24-pin qfn 32 kb 4 kb
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